;(C)2006 wek http://www.efton.sk ;free for personal use ;for commercial use, please contact wek@efton.sk ;implementation of SEA by F.X.Standaert et al. ;Sea itself: 7878 cycles (incl. ret); 524 bytes code ROM, 6x4 bytes IRAM (Vec+Key), 3+1 regs (no need for R0/R1), no stack (except for the call) ;Sea property is that key remains "unchanged" ; ;iSea - see comment there, the same size and exec time ; ;EDSea - both ways, depending on EncDec flag ;8250 cycles incl. ret, 604 bytes code ROM ; DSEG AT 28h RVec: DS 6 LVec: DS 6 RKey: DS 6 LKey: DS 6 Cnt EQU R7 ;any register except R2..R4 (those used in algo; can be moved, too) ;can be moved to IRAM at a small penalty (cjne used) BSEG AT 0 EncDec: DBIT 1 ;Enc=0, Dec=1 CSEG SeaTest: mov r0,#RVec mov dptr,#TestTab SeaTX1: clr a movc a,@a+dptr mov @r0,a inc r0 inc dptr cjne r0,#RVec+4*6,SeaTX1 call Sea call ISea clr EncDec call EDSea setb EncDec call EDSea Stop: sjmp Stop TestTab: db 1,0,0,0,0,0 ;RVec db 0,0,0,0,0,0 ;LVec db 1,0,0,0,0,0 ;RKey db 0,0,0,0,0,0 ;LKey ;======================= forward SEA (encrypt) ============================== Sea: ;b=8, nb=6, 93 rounds mov Cnt,#1 ;23 ;i<[93+1]/2... -> 46 SeaX11: ;--- round 1 mov a,LVec+0 ;pre-word-rotation of LVec xch a,LVec+1 xch a,LVec+2 xch a,LVec+3 xch a,LVec+4 xch a,LVec+5 mov LVec+0,a mov a,RVec+0 ;--- round 1 add a,RKey+0 mov R2,a ;+0 mov a,RVec+1 add a,RKey+1 mov R3,a ;+1 mov a,RVec+2 add a,RKey+2 mov R4,a ;+2 anl a,R3 xrl a,R2 mov R2,a ;+0 stored for the rest of substitution rr a ;bitwise rotation xrl LVec+0,a mov a,R4 anl a,R2 xrl a,R3 xrl LVec+1,a ;=+1 orl a,R2 xrl a,R4 rl a xrl LVec+2,a ;=+2 mov a,RVec+3 ;----- repeat for following 3 bytes (4,5,6) add a,RKey+3 mov R2,a mov a,RVec+4 add a,RKey+4 mov R3,a mov a,RVec+5 add a,RKey+5 mov R4,a anl a,R3 xrl a,R2 mov R2,a rr a xrl LVec+3,a mov a,R4 anl a,R2 xrl a,R3 xrl LVec+4,a orl a,R2 xrl a,R4 rl a xrl LVec+5,a cjne Cnt,#47,SeaX12 ;when halfway through, swap keys, other key schedule and other key used ljmp SeaX21 SeaX12: mov a,RKey+0 ;--- round 1 Key schedule add a,Cnt ;assuming that all_rounds < 512 mov R2,a ;+0 mov a,RKey+2 anl a,RKey+1 xrl a,R2 mov R2,a ;+0 stored for the rest of substitution rr a ;bitwise rotation xrl LKey+1,a ;this includes the bytewise rotation (+0->+1); this needs no compensation mov a,RKey+2 anl a,R2 xrl a,RKey+1 xrl LKey+2,a orl a,R2 xrl a,RKey+2 rl a xrl LKey+3,a mov a,RKey+5 ;--- the same for following 3 bytes of key anl a,RKey+4 xrl a,RKey+3 mov R2,a rr a xrl LKey+4,a mov a,RKey+5 anl a,R2 xrl a,RKey+4 xrl LKey+5,a orl a,R2 xrl a,RKey+5 rl a xrl LKey+0,a inc Cnt ;------- now round 2; rename R<->L both Vec and Key; mov a,RVec+0 ;pre-word-rotation of RVec xch a,RVec+1 xch a,RVec+2 xch a,RVec+3 xch a,RVec+4 xch a,RVec+5 mov RVec+0,a mov a,LVec+0 ;--- round 2 add a,LKey+0 mov R2,a ;+0 mov a,LVec+1 add a,LKey+1 mov R3,a ;+1 mov a,LVec+2 add a,LKey+2 mov R4,a ;+2 anl a,R3 xrl a,R2 mov R2,a ;+0 stored for the rest of substitution rr a ;bitwise rotation xrl RVec+0,a mov a,R4 anl a,R2 xrl a,R3 xrl RVec+1,a ;=+1 orl a,R2 xrl a,R4 rl a xrl RVec+2,a ;=+2 mov a,LVec+3 ;----- repeat for following 3 bytes (4,5,6) add a,LKey+3 mov R2,a mov a,LVec+4 add a,LKey+4 mov R3,a mov a,LVec+5 add a,LKey+5 mov R4,a anl a,R3 xrl a,R2 mov R2,a rr a xrl RVec+3,a mov a,R4 anl a,R2 xrl a,R3 xrl RVec+4,a orl a,R2 xrl a,R4 rl a xrl RVec+5,a mov a,LKey+0 ;--- round 2 Key schedule add a,Cnt ;assuming that all_rounds < 512 mov R2,a ;+0 mov a,LKey+2 anl a,LKey+1 xrl a,R2 mov R2,a ;+0 stored for the rest of substitution rr a ;bitwise rotation xrl RKey+1,a ;this includes the bytewise rotation (+0->+1); this needs no compensation mov a,LKey+2 anl a,R2 xrl a,LKey+1 xrl RKey+2,a orl a,R2 xrl a,LKey+2 rl a xrl RKey+3,a mov a,LKey+5 ;--- the same for following 3 bytes of key anl a,LKey+4 xrl a,LKey+3 mov R2,a rr a xrl RKey+4,a mov a,LKey+5 anl a,R2 xrl a,LKey+4 xrl RKey+5,a orl a,R2 xrl a,LKey+5 rl a xrl RKey+0,a inc Cnt ljmp SeaX11 ;--- halfway through. Continue with swap keys, other key schedule (n-cnt), other key used ;--- key swap by renaming RKey<->LKey ;don't forget that Vec needs to be renamed too as we left the 1st part after odd nr of round ; SeaX21: dec Cnt ;--- this is instead of nround-i mov a,LKey+0 ;--- odd round key schedule, but key is swapped -> renamed add a,Cnt ;assuming that all_rounds < 512 mov R2,a ;+0 mov a,LKey+2 anl a,LKey+1 xrl a,R2 mov R2,a ;+0 stored for the rest of substitution rr a ;bitwise rotation xrl RKey+1,a ;this includes the bytewise rotation (+0->+1); this needs no compensation mov a,LKey+2 anl a,R2 xrl a,LKey+1 xrl RKey+2,a orl a,R2 xrl a,LKey+2 rl a xrl RKey+3,a mov a,LKey+5 ;--- the same for following 3 bytes of key anl a,LKey+4 xrl a,LKey+3 mov R2,a rr a xrl RKey+4,a mov a,LKey+5 anl a,R2 xrl a,LKey+4 xrl RKey+5,a orl a,R2 xrl a,LKey+5 rl a xrl RKey+0,a ;------- now even round; rename R<->L both Vec and Key (but Key is already renamed due to swap; but the other part of key is used in part2...); mov a,RVec+0 ;pre-word-rotation of RVec xch a,RVec+1 xch a,RVec+2 xch a,RVec+3 xch a,RVec+4 xch a,RVec+5 mov RVec+0,a mov a,LVec+0 ;--- even round add a,LKey+0 mov R2,a ;+0 mov a,LVec+1 add a,LKey+1 mov R3,a ;+1 mov a,LVec+2 add a,LKey+2 mov R4,a ;+2 anl a,R3 xrl a,R2 mov R2,a ;+0 stored for the rest of substitution rr a ;bitwise rotation xrl RVec+0,a mov a,R4 anl a,R2 xrl a,R3 xrl RVec+1,a ;=+1 orl a,R2 xrl a,R4 rl a xrl RVec+2,a ;=+2 mov a,LVec+3 ;----- repeat for following 3 bytes (4,5,6) add a,LKey+3 mov R2,a mov a,LVec+4 add a,LKey+4 mov R3,a mov a,LVec+5 add a,LKey+5 mov R4,a anl a,R3 xrl a,R2 mov R2,a rr a xrl RVec+3,a mov a,R4 anl a,R2 xrl a,R3 xrl RVec+4,a orl a,R2 xrl a,R4 rl a xrl RVec+5,a dec Cnt mov a,RKey+0 ;--- even round Key schedule - due to swap renamed LKey<->RKey add a,Cnt ;assuming that all_rounds < 512 mov R2,a ;+0 mov a,RKey+2 anl a,RKey+1 xrl a,R2 mov R2,a ;+0 stored for the rest of substitution rr a ;bitwise rotation xrl LKey+1,a ;this includes the bytewise rotation (+0->+1); this needs no compensation mov a,RKey+2 anl a,R2 xrl a,RKey+1 xrl LKey+2,a orl a,R2 xrl a,RKey+2 rl a xrl LKey+3,a mov a,RKey+5 ;--- the same for following 3 bytes of key anl a,RKey+4 xrl a,RKey+3 mov R2,a rr a xrl LKey+4,a mov a,RKey+5 anl a,R2 xrl a,RKey+4 xrl LKey+5,a orl a,R2 xrl a,RKey+5 rl a xrl LKey+0,a ;--- odd round mov a,LVec+0 ;pre-word-rotation of LVec xch a,LVec+1 xch a,LVec+2 xch a,LVec+3 xch a,LVec+4 xch a,LVec+5 mov LVec+0,a mov a,RVec+0 ;--- odd round add a,RKey+0 mov R2,a ;+0 mov a,RVec+1 add a,RKey+1 mov R3,a ;+1 mov a,RVec+2 add a,RKey+2 mov R4,a ;+2 anl a,R3 xrl a,R2 mov R2,a ;+0 stored for the rest of substitution rr a ;bitwise rotation xrl LVec+0,a mov a,R4 anl a,R2 xrl a,R3 xrl LVec+1,a ;=+1 orl a,R2 xrl a,R4 rl a xrl LVec+2,a ;=+2 mov a,RVec+3 ;----- repeat for following 3 bytes (4,5,6) add a,RKey+3 mov R2,a mov a,RVec+4 add a,RKey+4 mov R3,a mov a,RVec+5 add a,RKey+5 mov R4,a anl a,R3 xrl a,R2 mov R2,a rr a xrl LVec+3,a mov a,R4 anl a,R2 xrl a,R3 xrl LVec+4,a orl a,R2 xrl a,R4 rl a xrl LVec+5,a cjne Cnt,#1,SeaX22 sjmp SeaX23 SeaX22: ljmp SeaX21 SeaX23: ;----- finished. LKey<->RKey swap not needed due to previous rename. ; LVec<->RVec swap not needed as the last step did not swap (as none does). ret ;======================= inverse SEA (decrypt) ============================== ;--- differs from forward SEA only in placement of word rotation - it is ; pre-word-rotation in forward and post-inverse-word-rotation in backward ISea: ;b=8, nb=6, 93 rounds mov Cnt,#1 ;23 ;i<[93+1]/2... -> 46 ISeaX11: ;--- round 1 mov a,RVec+0 ;--- round 1 add a,RKey+0 mov R2,a ;+0 mov a,RVec+1 add a,RKey+1 mov R3,a ;+1 mov a,RVec+2 add a,RKey+2 mov R4,a ;+2 anl a,R3 xrl a,R2 mov R2,a ;+0 stored for the rest of substitution rr a ;bitwise rotation xrl LVec+0,a mov a,R4 anl a,R2 xrl a,R3 xrl LVec+1,a ;=+1 orl a,R2 xrl a,R4 rl a xrl LVec+2,a ;=+2 mov a,RVec+3 ;----- repeat for following 3 bytes (4,5,6) add a,RKey+3 mov R2,a mov a,RVec+4 add a,RKey+4 mov R3,a mov a,RVec+5 add a,RKey+5 mov R4,a anl a,R3 xrl a,R2 mov R2,a rr a xrl LVec+3,a mov a,R4 anl a,R2 xrl a,R3 xrl LVec+4,a orl a,R2 xrl a,R4 rl a xrl LVec+5,a mov a,LVec+0 ;post-inverse-word-rotation of LVec xch a,LVec+5 xch a,LVec+4 xch a,LVec+3 xch a,LVec+2 xch a,LVec+1 mov LVec+0,a cjne Cnt,#47,ISeaX12 ;when halfway through, swap keys, other key schedule and other key used ljmp ISeaX21 ISeaX12: mov a,RKey+0 ;--- round 1 Key schedule add a,Cnt ;assuming that all_rounds < 512 mov R2,a ;+0 mov a,RKey+2 anl a,RKey+1 xrl a,R2 mov R2,a ;+0 stored for the rest of substitution rr a ;bitwise rotation xrl LKey+1,a ;this includes the bytewise rotation (+0->+1); this needs no compensation mov a,RKey+2 anl a,R2 xrl a,RKey+1 xrl LKey+2,a orl a,R2 xrl a,RKey+2 rl a xrl LKey+3,a mov a,RKey+5 ;--- the same for following 3 bytes of key anl a,RKey+4 xrl a,RKey+3 mov R2,a rr a xrl LKey+4,a mov a,RKey+5 anl a,R2 xrl a,RKey+4 xrl LKey+5,a orl a,R2 xrl a,RKey+5 rl a xrl LKey+0,a inc Cnt ;------- now round 2; rename R<->L both Vec and Key; mov a,LVec+0 ;--- round 2 add a,LKey+0 mov R2,a ;+0 mov a,LVec+1 add a,LKey+1 mov R3,a ;+1 mov a,LVec+2 add a,LKey+2 mov R4,a ;+2 anl a,R3 xrl a,R2 mov R2,a ;+0 stored for the rest of substitution rr a ;bitwise rotation xrl RVec+0,a mov a,R4 anl a,R2 xrl a,R3 xrl RVec+1,a ;=+1 orl a,R2 xrl a,R4 rl a xrl RVec+2,a ;=+2 mov a,LVec+3 ;----- repeat for following 3 bytes (4,5,6) add a,LKey+3 mov R2,a mov a,LVec+4 add a,LKey+4 mov R3,a mov a,LVec+5 add a,LKey+5 mov R4,a anl a,R3 xrl a,R2 mov R2,a rr a xrl RVec+3,a mov a,R4 anl a,R2 xrl a,R3 xrl RVec+4,a orl a,R2 xrl a,R4 rl a xrl RVec+5,a mov a,RVec+0 ;post-inverse-word-rotation of RVec xch a,RVec+5 xch a,RVec+4 xch a,RVec+3 xch a,RVec+2 xch a,RVec+1 mov RVec+0,a mov a,LKey+0 ;--- round 2 Key schedule add a,Cnt ;assuming that all_rounds < 512 mov R2,a ;+0 mov a,LKey+2 anl a,LKey+1 xrl a,R2 mov R2,a ;+0 stored for the rest of substitution rr a ;bitwise rotation xrl RKey+1,a ;this includes the bytewise rotation (+0->+1); this needs no compensation mov a,LKey+2 anl a,R2 xrl a,LKey+1 xrl RKey+2,a orl a,R2 xrl a,LKey+2 rl a xrl RKey+3,a mov a,LKey+5 ;--- the same for following 3 bytes of key anl a,LKey+4 xrl a,LKey+3 mov R2,a rr a xrl RKey+4,a mov a,LKey+5 anl a,R2 xrl a,LKey+4 xrl RKey+5,a orl a,R2 xrl a,LKey+5 rl a xrl RKey+0,a inc Cnt ljmp ISeaX11 ;--- halfway through. Continue with swap keys, other key schedule (n-cnt), other key used ;--- key swap by renaming RKey<->LKey ;don't forget that Vec needs to be renamed too as we left the 1st part after odd nr of round ; ISeaX21: dec Cnt ;--- this is instead of nround-i mov a,LKey+0 ;--- odd round key schedule, but key is swapped -> renamed add a,Cnt ;assuming that all_rounds < 512 mov R2,a ;+0 mov a,LKey+2 anl a,LKey+1 xrl a,R2 mov R2,a ;+0 stored for the rest of substitution rr a ;bitwise rotation xrl RKey+1,a ;this includes the bytewise rotation (+0->+1); this needs no compensation mov a,LKey+2 anl a,R2 xrl a,LKey+1 xrl RKey+2,a orl a,R2 xrl a,LKey+2 rl a xrl RKey+3,a mov a,LKey+5 ;--- the same for following 3 bytes of key anl a,LKey+4 xrl a,LKey+3 mov R2,a rr a xrl RKey+4,a mov a,LKey+5 anl a,R2 xrl a,LKey+4 xrl RKey+5,a orl a,R2 xrl a,LKey+5 rl a xrl RKey+0,a ;------- now even round; rename R<->L both Vec and Key (but Key is already renamed due to swap; but the other part of key is used in part2...); mov a,LVec+0 ;--- even round add a,LKey+0 mov R2,a ;+0 mov a,LVec+1 add a,LKey+1 mov R3,a ;+1 mov a,LVec+2 add a,LKey+2 mov R4,a ;+2 anl a,R3 xrl a,R2 mov R2,a ;+0 stored for the rest of substitution rr a ;bitwise rotation xrl RVec+0,a mov a,R4 anl a,R2 xrl a,R3 xrl RVec+1,a ;=+1 orl a,R2 xrl a,R4 rl a xrl RVec+2,a ;=+2 mov a,LVec+3 ;----- repeat for following 3 bytes (4,5,6) add a,LKey+3 mov R2,a mov a,LVec+4 add a,LKey+4 mov R3,a mov a,LVec+5 add a,LKey+5 mov R4,a anl a,R3 xrl a,R2 mov R2,a rr a xrl RVec+3,a mov a,R4 anl a,R2 xrl a,R3 xrl RVec+4,a orl a,R2 xrl a,R4 rl a xrl RVec+5,a mov a,RVec+0 ;post-inverse-word-rotation of RVec xch a,RVec+5 xch a,RVec+4 xch a,RVec+3 xch a,RVec+2 xch a,RVec+1 mov RVec+0,a dec Cnt mov a,RKey+0 ;--- even round Key schedule - due to swap renamed LKey<->RKey add a,Cnt ;assuming that all_rounds < 512 mov R2,a ;+0 mov a,RKey+2 anl a,RKey+1 xrl a,R2 mov R2,a ;+0 stored for the rest of substitution rr a ;bitwise rotation xrl LKey+1,a ;this includes the bytewise rotation (+0->+1); this needs no compensation mov a,RKey+2 anl a,R2 xrl a,RKey+1 xrl LKey+2,a orl a,R2 xrl a,RKey+2 rl a xrl LKey+3,a mov a,RKey+5 ;--- the same for following 3 bytes of key anl a,RKey+4 xrl a,RKey+3 mov R2,a rr a xrl LKey+4,a mov a,RKey+5 anl a,R2 xrl a,RKey+4 xrl LKey+5,a orl a,R2 xrl a,RKey+5 rl a xrl LKey+0,a ;--- odd round mov a,RVec+0 ;--- odd round add a,RKey+0 mov R2,a ;+0 mov a,RVec+1 add a,RKey+1 mov R3,a ;+1 mov a,RVec+2 add a,RKey+2 mov R4,a ;+2 anl a,R3 xrl a,R2 mov R2,a ;+0 stored for the rest of substitution rr a ;bitwise rotation xrl LVec+0,a mov a,R4 anl a,R2 xrl a,R3 xrl LVec+1,a ;=+1 orl a,R2 xrl a,R4 rl a xrl LVec+2,a ;=+2 mov a,RVec+3 ;----- repeat for following 3 bytes (4,5,6) add a,RKey+3 mov R2,a mov a,RVec+4 add a,RKey+4 mov R3,a mov a,RVec+5 add a,RKey+5 mov R4,a anl a,R3 xrl a,R2 mov R2,a rr a xrl LVec+3,a mov a,R4 anl a,R2 xrl a,R3 xrl LVec+4,a orl a,R2 xrl a,R4 rl a xrl LVec+5,a mov a,LVec+0 ;post-inverse-word-rotation of LVec xch a,LVec+5 xch a,LVec+4 xch a,LVec+3 xch a,LVec+2 xch a,LVec+1 mov LVec+0,a cjne Cnt,#1,ISeaX22 sjmp ISeaX23 ISeaX22: ljmp ISeaX21 ISeaX23: ;----- finished. LKey<->RKey swap not needed due to previous rename. ; LVec<->RVec swap not needed as the last step did not swap (as none does). ret ;================== Both Ways SEA (depends on EncDec flag) ================= EDSea: ;b=8, nb=6, 93 rounds mov Cnt,#1 ;23 ;i<[93+1]/2... -> 46 EDSeaX11: ;--- round 1 jb EncDec,EDSeaX16 mov a,LVec+0 ;pre-word-rotation of LVec xch a,LVec+1 xch a,LVec+2 xch a,LVec+3 xch a,LVec+4 xch a,LVec+5 mov LVec+0,a EDSeaX16: mov a,RVec+0 ;--- round 1 add a,RKey+0 mov R2,a ;+0 mov a,RVec+1 add a,RKey+1 mov R3,a ;+1 mov a,RVec+2 add a,RKey+2 mov R4,a ;+2 anl a,R3 xrl a,R2 mov R2,a ;+0 stored for the rest of substitution rr a ;bitwise rotation xrl LVec+0,a mov a,R4 anl a,R2 xrl a,R3 xrl LVec+1,a ;=+1 orl a,R2 xrl a,R4 rl a xrl LVec+2,a ;=+2 mov a,RVec+3 ;----- repeat for following 3 bytes (4,5,6) add a,RKey+3 mov R2,a mov a,RVec+4 add a,RKey+4 mov R3,a mov a,RVec+5 add a,RKey+5 mov R4,a anl a,R3 xrl a,R2 mov R2,a rr a xrl LVec+3,a mov a,R4 anl a,R2 xrl a,R3 xrl LVec+4,a orl a,R2 xrl a,R4 rl a xrl LVec+5,a jnb EncDec,EDSeaX14 mov a,LVec+0 ;post-inverse-word-rotation of LVec xch a,LVec+5 xch a,LVec+4 xch a,LVec+3 xch a,LVec+2 xch a,LVec+1 mov LVec+0,a EDSeaX14: cjne Cnt,#47,EDSeaX12 ;when halfway through, swap keys, other key schedule and other key used ljmp EDSeaX21 EDSeaX12: mov a,RKey+0 ;--- round 1 Key schedule add a,Cnt ;assuming that all_rounds < 512 mov R2,a ;+0 mov a,RKey+2 anl a,RKey+1 xrl a,R2 mov R2,a ;+0 stored for the rest of substitution rr a ;bitwise rotation xrl LKey+1,a ;this includes the bytewise rotation (+0->+1); this needs no compensation mov a,RKey+2 anl a,R2 xrl a,RKey+1 xrl LKey+2,a orl a,R2 xrl a,RKey+2 rl a xrl LKey+3,a mov a,RKey+5 ;--- the same for following 3 bytes of key anl a,RKey+4 xrl a,RKey+3 mov R2,a rr a xrl LKey+4,a mov a,RKey+5 anl a,R2 xrl a,RKey+4 xrl LKey+5,a orl a,R2 xrl a,RKey+5 rl a xrl LKey+0,a inc Cnt ;------- now round 2; rename R<->L both Vec and Key; jb EncDec,EDSeaX17 mov a,RVec+0 ;pre-word-rotation of RVec xch a,RVec+1 xch a,RVec+2 xch a,RVec+3 xch a,RVec+4 xch a,RVec+5 mov RVec+0,a EDSeaX17: mov a,LVec+0 ;--- round 2 add a,LKey+0 mov R2,a ;+0 mov a,LVec+1 add a,LKey+1 mov R3,a ;+1 mov a,LVec+2 add a,LKey+2 mov R4,a ;+2 anl a,R3 xrl a,R2 mov R2,a ;+0 stored for the rest of substitution rr a ;bitwise rotation xrl RVec+0,a mov a,R4 anl a,R2 xrl a,R3 xrl RVec+1,a ;=+1 orl a,R2 xrl a,R4 rl a xrl RVec+2,a ;=+2 mov a,LVec+3 ;----- repeat for following 3 bytes (4,5,6) add a,LKey+3 mov R2,a mov a,LVec+4 add a,LKey+4 mov R3,a mov a,LVec+5 add a,LKey+5 mov R4,a anl a,R3 xrl a,R2 mov R2,a rr a xrl RVec+3,a mov a,R4 anl a,R2 xrl a,R3 xrl RVec+4,a orl a,R2 xrl a,R4 rl a xrl RVec+5,a jnb EncDec,EDSeaX15 mov a,RVec+0 ;post-inverse-word-rotation of RVec xch a,RVec+5 xch a,RVec+4 xch a,RVec+3 xch a,RVec+2 xch a,RVec+1 mov RVec+0,a EDSeaX15: mov a,LKey+0 ;--- round 2 Key schedule add a,Cnt ;assuming that all_rounds < 512 mov R2,a ;+0 mov a,LKey+2 anl a,LKey+1 xrl a,R2 mov R2,a ;+0 stored for the rest of substitution rr a ;bitwise rotation xrl RKey+1,a ;this includes the bytewise rotation (+0->+1); this needs no compensation mov a,LKey+2 anl a,R2 xrl a,LKey+1 xrl RKey+2,a orl a,R2 xrl a,LKey+2 rl a xrl RKey+3,a mov a,LKey+5 ;--- the same for following 3 bytes of key anl a,LKey+4 xrl a,LKey+3 mov R2,a rr a xrl RKey+4,a mov a,LKey+5 anl a,R2 xrl a,LKey+4 xrl RKey+5,a orl a,R2 xrl a,LKey+5 rl a xrl RKey+0,a inc Cnt ljmp EDSeaX11 ;--- halfway through. Continue with swap keys, other key schedule (n-cnt), other key used ;--- key swap by renaming RKey<->LKey ;don't forget that Vec needs to be renamed too as we left the 1st part after odd nr of round ; EDSeaX21: dec Cnt ;--- this is instead of nround-i mov a,LKey+0 ;--- odd round key schedule, but key is swapped -> renamed add a,Cnt ;assuming that all_rounds < 512 mov R2,a ;+0 mov a,LKey+2 anl a,LKey+1 xrl a,R2 mov R2,a ;+0 stored for the rest of substitution rr a ;bitwise rotation xrl RKey+1,a ;this includes the bytewise rotation (+0->+1); this needs no compensation mov a,LKey+2 anl a,R2 xrl a,LKey+1 xrl RKey+2,a orl a,R2 xrl a,LKey+2 rl a xrl RKey+3,a mov a,LKey+5 ;--- the same for following 3 bytes of key anl a,LKey+4 xrl a,LKey+3 mov R2,a rr a xrl RKey+4,a mov a,LKey+5 anl a,R2 xrl a,LKey+4 xrl RKey+5,a orl a,R2 xrl a,LKey+5 rl a xrl RKey+0,a ;------- now even round; rename R<->L both Vec and Key (but Key is already renamed due to swap; but the other part of key is used in part2...); jb EncDec,EDSeaX26 mov a,RVec+0 ;pre-word-rotation of RVec xch a,RVec+1 xch a,RVec+2 xch a,RVec+3 xch a,RVec+4 xch a,RVec+5 mov RVec+0,a EDSeaX26: mov a,LVec+0 ;--- even round add a,LKey+0 mov R2,a ;+0 mov a,LVec+1 add a,LKey+1 mov R3,a ;+1 mov a,LVec+2 add a,LKey+2 mov R4,a ;+2 anl a,R3 xrl a,R2 mov R2,a ;+0 stored for the rest of substitution rr a ;bitwise rotation xrl RVec+0,a mov a,R4 anl a,R2 xrl a,R3 xrl RVec+1,a ;=+1 orl a,R2 xrl a,R4 rl a xrl RVec+2,a ;=+2 mov a,LVec+3 ;----- repeat for following 3 bytes (4,5,6) add a,LKey+3 mov R2,a mov a,LVec+4 add a,LKey+4 mov R3,a mov a,LVec+5 add a,LKey+5 mov R4,a anl a,R3 xrl a,R2 mov R2,a rr a xrl RVec+3,a mov a,R4 anl a,R2 xrl a,R3 xrl RVec+4,a orl a,R2 xrl a,R4 rl a xrl RVec+5,a jnb EncDec,EDSeaX25 mov a,RVec+0 ;post-inverse-word-rotation of RVec xch a,RVec+5 xch a,RVec+4 xch a,RVec+3 xch a,RVec+2 xch a,RVec+1 mov RVec+0,a EDSeaX25: dec Cnt mov a,RKey+0 ;--- even round Key schedule - due to swap renamed LKey<->RKey add a,Cnt ;assuming that all_rounds < 512 mov R2,a ;+0 mov a,RKey+2 anl a,RKey+1 xrl a,R2 mov R2,a ;+0 stored for the rest of substitution rr a ;bitwise rotation xrl LKey+1,a ;this includes the bytewise rotation (+0->+1); this needs no compensation mov a,RKey+2 anl a,R2 xrl a,RKey+1 xrl LKey+2,a orl a,R2 xrl a,RKey+2 rl a xrl LKey+3,a mov a,RKey+5 ;--- the same for following 3 bytes of key anl a,RKey+4 xrl a,RKey+3 mov R2,a rr a xrl LKey+4,a mov a,RKey+5 anl a,R2 xrl a,RKey+4 xrl LKey+5,a orl a,R2 xrl a,RKey+5 rl a xrl LKey+0,a ;--- odd round jb EncDec,EDSeaX27 mov a,LVec+0 ;pre-word-rotation of LVec xch a,LVec+1 xch a,LVec+2 xch a,LVec+3 xch a,LVec+4 xch a,LVec+5 mov LVec+0,a EDSeaX27: mov a,RVec+0 ;--- odd round add a,RKey+0 mov R2,a ;+0 mov a,RVec+1 add a,RKey+1 mov R3,a ;+1 mov a,RVec+2 add a,RKey+2 mov R4,a ;+2 anl a,R3 xrl a,R2 mov R2,a ;+0 stored for the rest of substitution rr a ;bitwise rotation xrl LVec+0,a mov a,R4 anl a,R2 xrl a,R3 xrl LVec+1,a ;=+1 orl a,R2 xrl a,R4 rl a xrl LVec+2,a ;=+2 mov a,RVec+3 ;----- repeat for following 3 bytes (4,5,6) add a,RKey+3 mov R2,a mov a,RVec+4 add a,RKey+4 mov R3,a mov a,RVec+5 add a,RKey+5 mov R4,a anl a,R3 xrl a,R2 mov R2,a rr a xrl LVec+3,a mov a,R4 anl a,R2 xrl a,R3 xrl LVec+4,a orl a,R2 xrl a,R4 rl a xrl LVec+5,a jnb EncDec,EDSeaX24 mov a,LVec+0 ;post-inverse-word-rotation of LVec xch a,LVec+5 xch a,LVec+4 xch a,LVec+3 xch a,LVec+2 xch a,LVec+1 mov LVec+0,a EDSeaX24: cjne Cnt,#1,EDSeaX22 sjmp EDSeaX23 EDSeaX22: ljmp EDSeaX21 EDSeaX23: ;----- finished. LKey<->RKey swap not needed due to previous rename. ; LVec<->RVec swap not needed as the last step did not swap (as none does). ret end