device programming

The original 8051 (and 8052) has a mask ROM (defined at the manufacturing time), so the "device programming" was performed by Intel (or alternative manufacturers) based on data delivered by the vendor.

There is also a ROM-less version called 8031/8032, which is usually a 8051/8052 with "undefined" (spoiled) content of ROM - this is possible thanks to the possibility to run program from external memory, and the /EA pin. For systems using these variants, the usual parallel EPROM/FLASH memory programming applies.

But for most of the "common" users, not using 10.000s or more mcu's at a time, models with programmable internal program memory have to be used (*). The first such controller was the 8751, where the program memory was an EPROM (either in ceramic windowed CERDIP package to utilize UV erasing/reprogramming, or in plastic packages (DIP, PLCC), so called one-time-programmable (OTP)) . Programming was performed in a (parallel) device programmer in a similar manner, than the EPROMs are programmed. The microcontroller is placed into the programming mode by applying a particular combination of 0s and 1s onto port pins while activating RST.

With the advent of electrically erasable/reprogrammable memory and its integration into the microcontroller as a program memory, FLASH versions of '51 gained increasing popularity. First, they have been programmed using device programmers - in a very similar way than the EPROM versions. The main difference is, that the FLASH usually produces the necessary "high voltage" (>5V) using an onboard charge pump and often utilises a self-timing algorithm, so the high programming voltage applied by the device programmer is needed only to "unlock" the device and place it into the programming mode. Unfortunately, some of the FLASH clones don't implement this security measure (sometimes deliberately, to facilitate low-voltage programming where appropriate), and with improper RST they may get into the programming state, corrupting the FLASH content. This resulted in certain mistrust to FLASH devices among the programmers.

Modern '51 clones implement besides conventional parallel programming (which is now considered as the last resort) also some means of serial programming, often called in system programming (ISP). It is either in the form of a SPI? bus, with programming performed during a similar special state (often RST active) than the parallel programming; or via the UART?, usually software driven (the software accomplishing the programming is called a bootloader, often provided by the manufacturer and located in a ROM, and the entering of it may be facilitated by certain hardware, e.g. holding /PSEN low while releasing RST). It is also increasingly common that the controller is able to reprogram its own FLASH - this is called in-application programming IAP, sometimes also supported by a set of API calls to the bootloader ROM. Some chips serially program via a JTAG connection.

device programmers and manufacturers?
programming algorithms??

(*) Certain clones implement RAM as a program memory (sometimes an integrated RAM can be used both as MOVX DATA MEMORY? and program memory, but these models do have a program FLASH). It is filled at boot time either by additional hardware from an attached serial? memory Dallas xxxx??, or via embedded USB controller from the connected host Cypress????.